/* $NetBSD: qcom,q6afe.h,v 1.1.1.2 2019/05/25 11:29:13 jmcneill Exp $ */ /* SPDX-License-Identifier: GPL-2.0 */ #ifndef __DT_BINDINGS_Q6_AFE_H__ #define __DT_BINDINGS_Q6_AFE_H__ /* Audio Front End (AFE) virtual ports IDs */ #define HDMI_RX 1 #define SLIMBUS_0_RX 2 #define SLIMBUS_0_TX 3 #define SLIMBUS_1_RX 4 #define SLIMBUS_1_TX 5 #define SLIMBUS_2_RX 6 #define SLIMBUS_2_TX 7 #define SLIMBUS_3_RX 8 #define SLIMBUS_3_TX 9 #define SLIMBUS_4_RX 10 #define SLIMBUS_4_TX 11 #define SLIMBUS_5_RX 12 #define SLIMBUS_5_TX 13 #define SLIMBUS_6_RX 14 #define SLIMBUS_6_TX 15 #define PRIMARY_MI2S_RX 16 #define PRIMARY_MI2S_TX 17 #define SECONDARY_MI2S_RX 18 #define SECONDARY_MI2S_TX 19 #define TERTIARY_MI2S_RX 20 #define TERTIARY_MI2S_TX 21 #define QUATERNARY_MI2S_RX 22 #define QUATERNARY_MI2S_TX 23 #define PRIMARY_TDM_RX_0 24 #define PRIMARY_TDM_TX_0 25 #define PRIMARY_TDM_RX_1 26 #define PRIMARY_TDM_TX_1 27 #define PRIMARY_TDM_RX_2 28 #define PRIMARY_TDM_TX_2 29 #define PRIMARY_TDM_RX_3 30 #define PRIMARY_TDM_TX_3 31 #define PRIMARY_TDM_RX_4 32 #define PRIMARY_TDM_TX_4 33 #define PRIMARY_TDM_RX_5 34 #define PRIMARY_TDM_TX_5 35 #define PRIMARY_TDM_RX_6 36 #define PRIMARY_TDM_TX_6 37 #define PRIMARY_TDM_RX_7 38 #define PRIMARY_TDM_TX_7 39 #define SECONDARY_TDM_RX_0 40 #define SECONDARY_TDM_TX_0 41 #define SECONDARY_TDM_RX_1 42 #define SECONDARY_TDM_TX_1 43 #define SECONDARY_TDM_RX_2 44 #define SECONDARY_TDM_TX_2 45 #define SECONDARY_TDM_RX_3 46 #define SECONDARY_TDM_TX_3 47 #define SECONDARY_TDM_RX_4 48 #define SECONDARY_TDM_TX_4 49 #define SECONDARY_TDM_RX_5 50 #define SECONDARY_TDM_TX_5 51 #define SECONDARY_TDM_RX_6 52 #define SECONDARY_TDM_TX_6 53 #define SECONDARY_TDM_RX_7 54 #define SECONDARY_TDM_TX_7 55 #define TERTIARY_TDM_RX_0 56 #define TERTIARY_TDM_TX_0 57 #define TERTIARY_TDM_RX_1 58 #define TERTIARY_TDM_TX_1 59 #define TERTIARY_TDM_RX_2 60 #define TERTIARY_TDM_TX_2 61 #define TERTIARY_TDM_RX_3 62 #define TERTIARY_TDM_TX_3 63 #define TERTIARY_TDM_RX_4 64 #define TERTIARY_TDM_TX_4 65 #define TERTIARY_TDM_RX_5 66 #define TERTIARY_TDM_TX_5 67 #define TERTIARY_TDM_RX_6 68 #define TERTIARY_TDM_TX_6 69 #define TERTIARY_TDM_RX_7 70 #define TERTIARY_TDM_TX_7 71 #define QUATERNARY_TDM_RX_0 72 #define QUATERNARY_TDM_TX_0 73 #define QUATERNARY_TDM_RX_1 74 #define QUATERNARY_TDM_TX_1 75 #define QUATERNARY_TDM_RX_2 76 #define QUATERNARY_TDM_TX_2 77 #define QUATERNARY_TDM_RX_3 78 #define QUATERNARY_TDM_TX_3 79 #define QUATERNARY_TDM_RX_4 80 #define QUATERNARY_TDM_TX_4 81 #define QUATERNARY_TDM_RX_5 82 #define QUATERNARY_TDM_TX_5 83 #define QUATERNARY_TDM_RX_6 84 #define QUATERNARY_TDM_TX_6 85 #define QUATERNARY_TDM_RX_7 86 #define QUATERNARY_TDM_TX_7 87 #define QUINARY_TDM_RX_0 88 #define QUINARY_TDM_TX_0 89 #define QUINARY_TDM_RX_1 90 #define QUINARY_TDM_TX_1 91 #define QUINARY_TDM_RX_2 92 #define QUINARY_TDM_TX_2 93 #define QUINARY_TDM_RX_3 94 #define QUINARY_TDM_TX_3 95 #define QUINARY_TDM_RX_4 96 #define QUINARY_TDM_TX_4 97 #define QUINARY_TDM_RX_5 98 #define QUINARY_TDM_TX_5 99 #define QUINARY_TDM_RX_6 100 #define QUINARY_TDM_TX_6 101 #define QUINARY_TDM_RX_7 102 #define QUINARY_TDM_TX_7 103 #define DISPLAY_PORT_RX 104 #endif /* __DT_BINDINGS_Q6_AFE_H__ */