<?xml version="1.0" encoding="ISO-8859-1"?>
<?xml-stylesheet href="tests.xsl" type="text/xsl"?>

<TEST>
<NAME>CHK HPET</NAME>

<DESCRIPTION>
This test checks the HPET PCI BAR for each timer block in the timer.
The base address is passed by the firmware via an ACPI table.
IRQ routing and initialization is also verified by the test.
</DESCRIPTION>

<FAIL>
<MSG>Failed to locate HPET base</MSG>
<DETAILS>
The firmware AML code doesn't advertize the HPET base.  HPET might be disabled in the bios settings, or not supported by the platform.  This was determined by looking at the DSDT tables.
</DETAILS>
</FAIL>

<FAIL>
<MSG>Mismatched HPET base between DSDT and the kernel</MSG>
<DETAILS>
Mismatched HPET base between DSDT (%x) and the kernel %y.  The HPET base in DSDT and the HPET base in the kernel dmesg are mismatched.
</DETAILS>
</FAIL>

<FAIL>
<MSG>Invalid VID, at HPET register base></MSG>
<DETAILS>
HPET ID doesn't correctly match the vendor ID.
</DETAILS>
</FAIL>

<WARN>
<MSG>HPET driver in the kernel is enabled, inaccurate results follow</MSG>
<DETAILS>
Detection of HPET driver allocation and initialization of the HPET should be before 
the driver module_init routine is called.  This enables platform code which uses 
timer 0 or 1 as the main timer to intercept HPET initialization.  Here, the kernel
looks like it's doing the allocation and init instead.
</DETAILS>
</WARN>

<WARN>
<MSG>Invalid clock period %x, must be non-zero and less than 10^8 fs</MSG>
<DETAILS>
</DETAILS>
</WARN>

</TEST>
