1 | /* $NetBSD: mainbus.c,v 1.37 2016/06/21 11:33:32 nonaka Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. |
5 | * |
6 | * Redistribution and use in source and binary forms, with or without |
7 | * modification, are permitted provided that the following conditions |
8 | * are met: |
9 | * 1. Redistributions of source code must retain the above copyright |
10 | * notice, this list of conditions and the following disclaimer. |
11 | * 2. Redistributions in binary form must reproduce the above copyright |
12 | * notice, this list of conditions and the following disclaimer in the |
13 | * documentation and/or other materials provided with the distribution. |
14 | * 3. All advertising materials mentioning features or use of this software |
15 | * must display the following acknowledgement: |
16 | * This product includes software developed by Christopher G. Demetriou |
17 | * for the NetBSD Project. |
18 | * 4. The name of the author may not be used to endorse or promote products |
19 | * derived from this software without specific prior written permission |
20 | * |
21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
31 | */ |
32 | |
33 | #include <sys/cdefs.h> |
34 | __KERNEL_RCSID(0, "$NetBSD: mainbus.c,v 1.37 2016/06/21 11:33:32 nonaka Exp $" ); |
35 | |
36 | #include <sys/param.h> |
37 | #include <sys/systm.h> |
38 | #include <sys/device.h> |
39 | #include <sys/reboot.h> |
40 | #include <sys/bus.h> |
41 | |
42 | #include <dev/isa/isavar.h> |
43 | #include <dev/pci/pcivar.h> |
44 | |
45 | #include <dev/isa/isareg.h> |
46 | |
47 | #include "pci.h" |
48 | #include "isa.h" |
49 | #include "isadma.h" |
50 | #include "acpica.h" |
51 | #include "ipmi.h" |
52 | |
53 | #include "opt_acpi.h" |
54 | #include "opt_mpbios.h" |
55 | #include "opt_pcifixup.h" |
56 | |
57 | #include <machine/cpuvar.h> |
58 | #include <machine/i82093var.h> |
59 | #include <machine/mpbiosvar.h> |
60 | #include <machine/mpacpi.h> |
61 | |
62 | #if NACPICA > 0 |
63 | #include <dev/acpi/acpivar.h> |
64 | #endif |
65 | |
66 | #if NIPMI > 0 |
67 | #include <x86/ipmivar.h> |
68 | #endif |
69 | |
70 | #if NPCI > 0 |
71 | #if defined(PCI_BUS_FIXUP) |
72 | #include <arch/x86/pci/pci_bus_fixup.h> |
73 | #if defined(PCI_ADDR_FIXUP) |
74 | #include <arch/x86/pci/pci_addr_fixup.h> |
75 | #endif |
76 | #endif |
77 | #include <arch/x86/pci/msipic.h> |
78 | #endif |
79 | |
80 | /* |
81 | * XXXfvdl ACPI |
82 | */ |
83 | |
84 | int mainbus_match(device_t, cfdata_t, void *); |
85 | void mainbus_attach(device_t, device_t, void *); |
86 | |
87 | CFATTACH_DECL_NEW(mainbus, 0, |
88 | mainbus_match, mainbus_attach, NULL, NULL); |
89 | |
90 | int mainbus_print(void *, const char *); |
91 | |
92 | union mainbus_attach_args { |
93 | const char *mba_busname; /* first elem of all */ |
94 | struct pcibus_attach_args mba_pba; |
95 | struct isabus_attach_args mba_iba; |
96 | struct cpu_attach_args mba_caa; |
97 | #if NACPICA > 0 |
98 | struct acpibus_attach_args mba_acpi; |
99 | #endif |
100 | struct apic_attach_args aaa_caa; |
101 | #if NIPMI > 0 |
102 | struct ipmi_attach_args mba_ipmi; |
103 | #endif |
104 | }; |
105 | |
106 | /* |
107 | * This is set when the ISA bus is attached. If it's not set by the |
108 | * time it's checked below, then mainbus attempts to attach an ISA. |
109 | */ |
110 | int isa_has_been_seen; |
111 | struct x86_isa_chipset x86_isa_chipset; |
112 | #if NISA > 0 |
113 | static const struct isabus_attach_args mba_iba = { |
114 | ._iba_busname = "isa" , |
115 | .iba_dmat = &isa_bus_dma_tag, |
116 | .iba_ic = &x86_isa_chipset |
117 | }; |
118 | #endif |
119 | |
120 | #if defined(MPBIOS) || NACPICA > 0 |
121 | struct mp_bus *mp_busses; |
122 | int mp_nbus; |
123 | struct mp_intr_map *mp_intrs; |
124 | int mp_nintr; |
125 | |
126 | int mp_isa_bus = -1; |
127 | int mp_eisa_bus = -1; |
128 | |
129 | # ifdef MPVERBOSE |
130 | # if MPVERBOSE > 0 |
131 | int mp_verbose = MPVERBOSE; |
132 | # else |
133 | int mp_verbose = 1; |
134 | # endif |
135 | # else |
136 | int mp_verbose = 0; |
137 | # endif |
138 | #endif |
139 | |
140 | |
141 | /* |
142 | * Probe for the mainbus; always succeeds. |
143 | */ |
144 | int |
145 | mainbus_match(device_t parent, cfdata_t match, void *aux) |
146 | { |
147 | |
148 | return 1; |
149 | } |
150 | |
151 | /* |
152 | * Attach the mainbus. |
153 | */ |
154 | void |
155 | mainbus_attach(device_t parent, device_t self, void *aux) |
156 | { |
157 | #if NPCI > 0 || NACPICA > 0 || NIPMI > 0 |
158 | union mainbus_attach_args mba; |
159 | #endif |
160 | #if NPCI > 0 |
161 | int mode; |
162 | #endif |
163 | #if NACPICA > 0 |
164 | int acpi_present = 0; |
165 | #endif |
166 | #ifdef MPBIOS |
167 | int mpbios_present = 0; |
168 | #endif |
169 | int mpacpi_active = 0; |
170 | int numcpus = 0; |
171 | #if defined(PCI_BUS_FIXUP) |
172 | int pci_maxbus = 0; |
173 | #endif |
174 | |
175 | aprint_naive("\n" ); |
176 | aprint_normal("\n" ); |
177 | |
178 | #ifdef MPBIOS |
179 | mpbios_present = mpbios_probe(self); |
180 | #endif |
181 | |
182 | #if NPCI > 0 |
183 | msipic_init(); |
184 | |
185 | /* |
186 | * ACPI needs to be able to access PCI configuration space. |
187 | */ |
188 | mode = pci_mode_detect(); |
189 | #if defined(PCI_BUS_FIXUP) |
190 | if (mode != 0) { |
191 | pci_maxbus = pci_bus_fixup(NULL, 0); |
192 | aprint_debug("PCI bus max, after pci_bus_fixup: %i\n" , |
193 | pci_maxbus); |
194 | #if defined(PCI_ADDR_FIXUP) |
195 | pciaddr.extent_port = NULL; |
196 | pciaddr.extent_mem = NULL; |
197 | pci_addr_fixup(NULL, pci_maxbus); |
198 | #endif |
199 | } |
200 | #endif |
201 | #endif |
202 | |
203 | #if NACPICA > 0 |
204 | if ((boothowto & RB_MD2) == 0 && acpi_check(self, "acpibus" )) |
205 | acpi_present = acpi_probe(); |
206 | /* |
207 | * First, see if the MADT contains CPUs, and possibly I/O APICs. |
208 | * Building the interrupt routing structures can only |
209 | * be done later (via a callback). |
210 | */ |
211 | if (acpi_present) |
212 | mpacpi_active = mpacpi_scan_apics(self, &numcpus); |
213 | #endif |
214 | |
215 | if (!mpacpi_active) { |
216 | #ifdef MPBIOS |
217 | if (mpbios_present) |
218 | mpbios_scan(self, &numcpus); |
219 | else |
220 | #endif |
221 | if (numcpus == 0) { |
222 | struct cpu_attach_args caa; |
223 | |
224 | memset(&caa, 0, sizeof(caa)); |
225 | caa.cpu_number = 0; |
226 | caa.cpu_role = CPU_ROLE_SP; |
227 | caa.cpu_func = 0; |
228 | |
229 | config_found_ia(self, "cpubus" , &caa, mainbus_print); |
230 | } |
231 | } |
232 | |
233 | #if NISADMA > 0 && NACPICA > 0 |
234 | /* |
235 | * ACPI needs ISA DMA initialized before they start probing. |
236 | */ |
237 | isa_dmainit(&x86_isa_chipset, x86_bus_space_io, &isa_bus_dma_tag, |
238 | self); |
239 | #endif |
240 | |
241 | #if NACPICA > 0 |
242 | if (acpi_present) { |
243 | mba.mba_acpi.aa_iot = x86_bus_space_io; |
244 | mba.mba_acpi.aa_memt = x86_bus_space_mem; |
245 | mba.mba_acpi.aa_pc = NULL; |
246 | mba.mba_acpi.aa_pciflags = |
247 | PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY | |
248 | PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | |
249 | PCI_FLAGS_MWI_OKAY; |
250 | mba.mba_acpi.aa_ic = &x86_isa_chipset; |
251 | mba.mba_acpi.aa_dmat = &pci_bus_dma_tag; |
252 | mba.mba_acpi.aa_dmat64 = &pci_bus_dma64_tag; |
253 | config_found_ia(self, "acpibus" , &mba.mba_acpi, 0); |
254 | } |
255 | #endif |
256 | |
257 | #if NIPMI > 0 |
258 | memset(&mba.mba_ipmi, 0, sizeof(mba.mba_ipmi)); |
259 | mba.mba_ipmi.iaa_iot = x86_bus_space_io; |
260 | mba.mba_ipmi.iaa_memt = x86_bus_space_mem; |
261 | if (ipmi_probe(&mba.mba_ipmi)) |
262 | config_found_ia(self, "ipmibus" , &mba.mba_ipmi, 0); |
263 | #endif |
264 | |
265 | #if NPCI > 0 |
266 | if (mode != 0) { |
267 | int npcibus = 0; |
268 | |
269 | mba.mba_pba.pba_iot = x86_bus_space_io; |
270 | mba.mba_pba.pba_memt = x86_bus_space_mem; |
271 | mba.mba_pba.pba_dmat = &pci_bus_dma_tag; |
272 | mba.mba_pba.pba_dmat64 = &pci_bus_dma64_tag; |
273 | mba.mba_pba.pba_pc = NULL; |
274 | mba.mba_pba.pba_flags = |
275 | PCI_FLAGS_IO_OKAY | PCI_FLAGS_MEM_OKAY | |
276 | PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | |
277 | PCI_FLAGS_MWI_OKAY; |
278 | mba.mba_pba.pba_bus = 0; |
279 | mba.mba_pba.pba_bridgetag = NULL; |
280 | #if NACPICA > 0 && defined(ACPI_SCANPCI) |
281 | if (npcibus == 0 && mpacpi_active) |
282 | npcibus = mp_pci_scan(self, &mba.mba_pba, pcibusprint); |
283 | #endif |
284 | #if defined(MPBIOS) && defined(MPBIOS_SCANPCI) |
285 | if (npcibus == 0 && mpbios_scanned != 0) |
286 | npcibus = mp_pci_scan(self, &mba.mba_pba, pcibusprint); |
287 | #endif |
288 | if (npcibus == 0) |
289 | config_found_ia(self, "pcibus" , &mba.mba_pba, |
290 | pcibusprint); |
291 | |
292 | #if NACPICA > 0 |
293 | if (mp_verbose) |
294 | acpi_pci_link_state(); |
295 | #endif |
296 | |
297 | } |
298 | #endif |
299 | |
300 | #if NISA > 0 |
301 | if (isa_has_been_seen == 0) { |
302 | mba.mba_iba = mba_iba; |
303 | mba.mba_iba.iba_iot = x86_bus_space_io; |
304 | mba.mba_iba.iba_memt = x86_bus_space_mem; |
305 | config_found_ia(self, "isabus" , &mba.mba_iba, isabusprint); |
306 | } |
307 | #endif |
308 | |
309 | if (!pmf_device_register(self, NULL, NULL)) |
310 | aprint_error_dev(self, "couldn't establish power handler\n" ); |
311 | } |
312 | |
313 | int |
314 | mainbus_print(void *aux, const char *pnp) |
315 | { |
316 | union mainbus_attach_args *mba = aux; |
317 | |
318 | if (pnp) |
319 | aprint_normal("%s at %s" , mba->mba_busname, pnp); |
320 | return (UNCONF); |
321 | } |
322 | |