1 | /* $NetBSD: mcontext.h,v 1.18 2014/05/12 22:50:03 uebayasi Exp $ */ |
2 | |
3 | /*- |
4 | * Copyright (c) 1999 The NetBSD Foundation, Inc. |
5 | * All rights reserved. |
6 | * |
7 | * This code is derived from software contributed to The NetBSD Foundation |
8 | * by Klaus Klein. |
9 | * |
10 | * Redistribution and use in source and binary forms, with or without |
11 | * modification, are permitted provided that the following conditions |
12 | * are met: |
13 | * 1. Redistributions of source code must retain the above copyright |
14 | * notice, this list of conditions and the following disclaimer. |
15 | * 2. Redistributions in binary form must reproduce the above copyright |
16 | * notice, this list of conditions and the following disclaimer in the |
17 | * documentation and/or other materials provided with the distribution. |
18 | * |
19 | * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS |
20 | * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED |
21 | * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR |
22 | * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS |
23 | * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR |
24 | * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF |
25 | * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS |
26 | * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN |
27 | * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) |
28 | * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE |
29 | * POSSIBILITY OF SUCH DAMAGE. |
30 | */ |
31 | |
32 | #ifndef _AMD64_MCONTEXT_H_ |
33 | #define _AMD64_MCONTEXT_H_ |
34 | |
35 | #ifdef __x86_64__ |
36 | |
37 | #include <machine/frame_regs.h> |
38 | |
39 | /* |
40 | * General register state |
41 | */ |
42 | #define GREG_OFFSETS(reg, REG, idx) _REG_##REG = idx, |
43 | enum { _FRAME_GREG(GREG_OFFSETS) _NGREG = 26 }; |
44 | #undef GREG_OFFSETS |
45 | |
46 | typedef unsigned long __greg_t; |
47 | typedef __greg_t __gregset_t[_NGREG]; |
48 | |
49 | /* These names are for compatibility */ |
50 | #define _REG_URSP _REG_RSP |
51 | #define _REG_RFL _REG_RFLAGS |
52 | |
53 | /* |
54 | * Floating point register state |
55 | * The format of __fpregset_t is that of the fxsave instruction |
56 | * which requires 16 byte alignment. However the mcontext version |
57 | * is never directly accessed. |
58 | */ |
59 | typedef char __fpregset_t[512] __aligned(8); |
60 | |
61 | typedef struct { |
62 | __gregset_t __gregs; |
63 | __greg_t _mc_tlsbase; |
64 | __fpregset_t __fpregs; |
65 | } mcontext_t; |
66 | |
67 | #define _UC_UCONTEXT_ALIGN (~0xf) |
68 | |
69 | /* AMD64 ABI 128-bytes "red zone". */ |
70 | #define _UC_MACHINE_SP(uc) ((uc)->uc_mcontext.__gregs[_REG_RSP] - 128) |
71 | #define _UC_MACHINE_PC(uc) ((uc)->uc_mcontext.__gregs[_REG_RIP]) |
72 | #define _UC_MACHINE_INTRV(uc) ((uc)->uc_mcontext.__gregs[_REG_RAX]) |
73 | |
74 | #define _UC_MACHINE_SET_PC(uc, pc) _UC_MACHINE_PC(uc) = (pc) |
75 | |
76 | #define _UC_TLSBASE 0x00080000 |
77 | |
78 | /* |
79 | * mcontext extensions to handle signal delivery. |
80 | */ |
81 | #define _UC_SETSTACK 0x00010000 |
82 | #define _UC_CLRSTACK 0x00020000 |
83 | |
84 | #define __UCONTEXT_SIZE 784 |
85 | |
86 | static __inline void * |
87 | __lwp_getprivate_fast(void) |
88 | { |
89 | void *__tmp; |
90 | |
91 | __asm volatile("movq %%fs:0, %0" : "=r" (__tmp)); |
92 | |
93 | return __tmp; |
94 | } |
95 | |
96 | #ifdef _KERNEL |
97 | |
98 | /* |
99 | * 32bit context definitions. |
100 | */ |
101 | |
102 | #define _NGREG32 19 |
103 | typedef unsigned int __greg32_t; |
104 | typedef __greg32_t __gregset32_t[_NGREG32]; |
105 | |
106 | #define _REG32_GS 0 |
107 | #define _REG32_FS 1 |
108 | #define _REG32_ES 2 |
109 | #define _REG32_DS 3 |
110 | #define _REG32_EDI 4 |
111 | #define _REG32_ESI 5 |
112 | #define _REG32_EBP 6 |
113 | #define _REG32_ESP 7 |
114 | #define _REG32_EBX 8 |
115 | #define _REG32_EDX 9 |
116 | #define _REG32_ECX 10 |
117 | #define _REG32_EAX 11 |
118 | #define _REG32_TRAPNO 12 |
119 | #define _REG32_ERR 13 |
120 | #define _REG32_EIP 14 |
121 | #define _REG32_CS 15 |
122 | #define _REG32_EFL 16 |
123 | #define _REG32_UESP 17 |
124 | #define _REG32_SS 18 |
125 | |
126 | #define _UC_MACHINE32_SP(uc) ((uc)->uc_mcontext.__gregs[_REG32_UESP]) |
127 | |
128 | /* |
129 | * Floating point register state |
130 | */ |
131 | typedef struct { |
132 | union { |
133 | struct { |
134 | int __fp_state[27]; /* Environment and registers */ |
135 | } __fpchip_state; |
136 | struct { |
137 | char __fp_xmm[512]; |
138 | } __fp_xmm_state; |
139 | } __fp_reg_set; |
140 | int __fp_pad[33]; /* Historic padding */ |
141 | } __fpregset32_t; |
142 | |
143 | typedef struct { |
144 | __gregset32_t __gregs; |
145 | __fpregset32_t __fpregs; |
146 | uint32_t _mc_tlsbase; |
147 | } mcontext32_t; |
148 | |
149 | #define _UC_FXSAVE 0x20 /* FP state is in FXSAVE format in XMM space */ |
150 | |
151 | #define _UC_MACHINE32_PAD 4 |
152 | #define __UCONTEXT32_SIZE 776 |
153 | |
154 | #endif /* _KERNEL */ |
155 | |
156 | #else /* __x86_64__ */ |
157 | |
158 | #include <i386/mcontext.h> |
159 | |
160 | #endif /* __x86_64__ */ |
161 | |
162 | #endif /* !_AMD64_MCONTEXT_H_ */ |
163 | |