1 | /* $NetBSD: pci_machdep_common.h,v 1.23 2016/07/11 06:14:51 knakahara Exp $ */ |
2 | |
3 | /* |
4 | * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. |
5 | * Copyright (c) 1994 Charles M. Hannum. All rights reserved. |
6 | * |
7 | * Redistribution and use in source and binary forms, with or without |
8 | * modification, are permitted provided that the following conditions |
9 | * are met: |
10 | * 1. Redistributions of source code must retain the above copyright |
11 | * notice, this list of conditions and the following disclaimer. |
12 | * 2. Redistributions in binary form must reproduce the above copyright |
13 | * notice, this list of conditions and the following disclaimer in the |
14 | * documentation and/or other materials provided with the distribution. |
15 | * 3. All advertising materials mentioning features or use of this software |
16 | * must display the following acknowledgement: |
17 | * This product includes software developed by Charles M. Hannum. |
18 | * 4. The name of the author may not be used to endorse or promote products |
19 | * derived from this software without specific prior written permission. |
20 | * |
21 | * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR |
22 | * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES |
23 | * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. |
24 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, |
25 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT |
26 | * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, |
27 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY |
28 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT |
29 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF |
30 | * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
31 | */ |
32 | |
33 | #ifndef _X86_PCI_MACHDEP_COMMON_H_ |
34 | #define _X86_PCI_MACHDEP_COMMON_H_ |
35 | |
36 | /* |
37 | * Machine-specific definitions for PCI autoconfiguration. |
38 | */ |
39 | #define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH |
40 | #ifndef XEN |
41 | #define __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_DISESTABLISH |
42 | #endif |
43 | |
44 | #include <sys/kcpuset.h> |
45 | |
46 | /* |
47 | * x86-specific PCI structure and type definitions. |
48 | * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE. |
49 | * |
50 | * Configuration tag; created from a {bus,device,function} triplet by |
51 | * pci_make_tag(), and passed to pci_conf_read() and pci_conf_write(). |
52 | * We could instead always pass the {bus,device,function} triplet to |
53 | * the read and write routines, but this would cause extra overhead. |
54 | * |
55 | * Mode 2 is historical and deprecated by the Revision 2.0 specification. |
56 | * |
57 | * |
58 | * Mode 1 tag: |
59 | * 31 24 16 15 11 10 8 |
60 | * +---------------------------------------------------------------+ |
61 | * |1| 0 | BUS | DEV |FUNC | 0 | |
62 | * +---------------------------------------------------------------+ |
63 | */ |
64 | union x86_pci_tag_u { |
65 | uint32_t mode1; |
66 | struct { |
67 | uint16_t port; |
68 | uint8_t enable; |
69 | uint8_t forward; |
70 | } mode2; |
71 | }; |
72 | |
73 | extern struct x86_bus_dma_tag pci_bus_dma_tag; |
74 | #ifdef _LP64 |
75 | extern struct x86_bus_dma_tag pci_bus_dma64_tag; |
76 | #endif |
77 | |
78 | struct pci_attach_args; |
79 | struct pci_chipset_tag; |
80 | |
81 | /* |
82 | * Types provided to machine-independent PCI code |
83 | */ |
84 | typedef struct pci_chipset_tag *pci_chipset_tag_t; |
85 | typedef union x86_pci_tag_u pcitag_t; |
86 | |
87 | struct pci_chipset_tag { |
88 | pci_chipset_tag_t pc_super; |
89 | uint64_t pc_present; |
90 | const struct pci_overrides *pc_ov; |
91 | void *pc_ctx; |
92 | }; |
93 | |
94 | /* |
95 | * x86-specific PCI variables and functions. |
96 | * NOT TO BE USED DIRECTLY BY MACHINE INDEPENDENT CODE. |
97 | */ |
98 | int pci_mode_detect(void); |
99 | void pci_mode_set(int); |
100 | |
101 | /* |
102 | * Functions provided to machine-independent PCI code. |
103 | */ |
104 | void pci_attach_hook(device_t, device_t, |
105 | struct pcibus_attach_args *); |
106 | int pci_bus_maxdevs(pci_chipset_tag_t, int); |
107 | pcitag_t pci_make_tag(pci_chipset_tag_t, int, int, int); |
108 | void pci_decompose_tag(pci_chipset_tag_t, pcitag_t, |
109 | int *, int *, int *); |
110 | pcireg_t pci_conf_read(pci_chipset_tag_t, pcitag_t, int); |
111 | void pci_conf_write(pci_chipset_tag_t, pcitag_t, int, |
112 | pcireg_t); |
113 | int pci_intr_map(const struct pci_attach_args *, |
114 | pci_intr_handle_t *); |
115 | const char *pci_intr_string(pci_chipset_tag_t, pci_intr_handle_t, |
116 | char *, size_t); |
117 | const struct evcnt *pci_intr_evcnt(pci_chipset_tag_t, pci_intr_handle_t); |
118 | void *pci_intr_establish(pci_chipset_tag_t, pci_intr_handle_t, |
119 | int, int (*)(void *), void *); |
120 | void pci_intr_disestablish(pci_chipset_tag_t, void *); |
121 | |
122 | #ifdef __HAVE_PCI_MSI_MSIX |
123 | typedef enum { |
124 | PCI_INTR_TYPE_INTX = 0, |
125 | PCI_INTR_TYPE_MSI, |
126 | PCI_INTR_TYPE_MSIX, |
127 | PCI_INTR_TYPE_SIZE, |
128 | } pci_intr_type_t; |
129 | |
130 | pci_intr_type_t pci_intr_type(pci_chipset_tag_t, pci_intr_handle_t); |
131 | /* |
132 | * Wrapper function for generally unitied allocation to fallback MSI-X/MSI/INTx |
133 | * automatically. |
134 | */ |
135 | int pci_intr_alloc(const struct pci_attach_args *, |
136 | pci_intr_handle_t **, int *, pci_intr_type_t); |
137 | void pci_intr_release(pci_chipset_tag_t, pci_intr_handle_t *, |
138 | int); |
139 | #endif |
140 | |
141 | /* |
142 | * If device drivers use MSI/MSI-X, they should use these API for INTx |
143 | * instead of pci_intr_map(), because of conforming the pci_intr_handle |
144 | * ownership to MSI/MSI-X. |
145 | */ |
146 | int pci_intx_alloc(const struct pci_attach_args *, |
147 | pci_intr_handle_t **); |
148 | |
149 | /* experimental MSI support */ |
150 | int pci_msi_alloc(const struct pci_attach_args *, |
151 | pci_intr_handle_t **, int *); |
152 | int pci_msi_alloc_exact(const struct pci_attach_args *, |
153 | pci_intr_handle_t **, int); |
154 | |
155 | /* experimental MSI-X support */ |
156 | int pci_msix_alloc(const struct pci_attach_args *, |
157 | pci_intr_handle_t **, int *); |
158 | int pci_msix_alloc_exact(const struct pci_attach_args *, |
159 | pci_intr_handle_t **, int); |
160 | int pci_msix_alloc_map(const struct pci_attach_args *, |
161 | pci_intr_handle_t **, u_int *, int); |
162 | |
163 | /* |
164 | * ALL OF THE FOLLOWING ARE MACHINE-DEPENDENT, AND SHOULD NOT BE USED |
165 | * BY PORTABLE CODE. |
166 | */ |
167 | |
168 | /* Extract Bus Number for a host bridge or -1 if unknown. */ |
169 | int pchb_get_bus_number(pci_chipset_tag_t, pcitag_t); |
170 | |
171 | /* |
172 | * Section 6.2.4, `Miscellaneous Functions' of the PCI Specification, |
173 | * says that 255 means `unknown' or `no connection' to the interrupt |
174 | * controller on a PC. |
175 | */ |
176 | #define X86_PCI_INTERRUPT_LINE_NO_CONNECTION 0xff |
177 | |
178 | void pci_device_foreach(pci_chipset_tag_t, int, |
179 | void (*)(pci_chipset_tag_t, pcitag_t, void*), |
180 | void *); |
181 | |
182 | void pci_device_foreach_min(pci_chipset_tag_t, int, int, |
183 | void (*)(pci_chipset_tag_t, pcitag_t, void*), |
184 | void *); |
185 | |
186 | void pci_bridge_foreach(pci_chipset_tag_t, int, int, |
187 | void (*) (pci_chipset_tag_t, pcitag_t, void *), void *); |
188 | |
189 | void pci_ranges_infer(pci_chipset_tag_t, int, int, bus_addr_t *, |
190 | bus_size_t *, bus_addr_t *, bus_size_t *); |
191 | |
192 | extern prop_dictionary_t pci_rsrc_dict; |
193 | prop_dictionary_t pci_rsrc_filter(prop_dictionary_t, |
194 | bool (*)(void *, prop_dictionary_t), void *arg); |
195 | |
196 | #endif /* _X86_PCI_MACHDEP_COMMON_H_ */ |
197 | |